1. Field of the Invention
The present invention relates to a memory element array.
2. Description of Related Art
With the miniaturization and the densification of devices, further miniaturization of electric elements is desired now. As an example, a switching element the switching operation of which is enabled by applying a voltage between two electrodes distant from each other by a minute gap (nanogap) is known.
To put it concretely, for example, a switching element has been developed which is made of stable materials, silicon oxide and gold, and can be manufactured by a simple manufacturing method, shadow evaporation, and further can repeat switching operations stably (see, for example, Japanese Patent Application Laid-Open Publication No. 2005-79335).
In order to apply such a switching element having a nanogap to a high-density memory, it is necessary to arrange the switching elements in array. However, if only switching elements are arranged in array, then sneak path currents may be generated, which causes a problem of making it difficult to read, write, and delete data.
Accordingly, a method of using a transistor or a diode to separate the switching element from an external circuit can be considered, for example, like a storage cell combining a laminated film of a nonlinear resistance layer and an insulation layer with a MOS transistor for separating the laminated film from the external circuit (see, for example, Japanese Patent Application Laid-Open Publication No. Hei 7-106440).
However, if a transistor or a diode is used for separating the switching element having a nanogap from the external circuit, then the following problems are caused: miniaturization is difficult because the number of impurity atoms greatly influences the characteristics of the switching element; and the number of processes of arraying is large and the processes are complicated.